​Shi-Hao Chen (Hock) is currently the CEO of DigWise Technology, a solution provider for best energy efficiency, and the CEO of DipSci Technology, a solution provider that provides on-chip process monitoring and machine learning technologies to improve productivity.
He received the Ph.D. degree from the Department of Computer Science, National Tsing Hua University, Hsinchu 30043, Taiwan in 2012.
His current research interests include machine-learning techniques for EDA, low-power and process-design co-optimization methodologies.

Abstract:

Exploring the use of Generative Adversarial Networks (GANs) to generate wafer-level Wafer Acceptance Test (WAT) and Chip Probe (CP) test data in chip manufacturing processes, with a focus on Design-Technology Co-Optimization (DTCO). The generated virtual silicon data encompasses essential performance characteristics, physical electrical properties, wafer-level process parameter distributions, as well as implicit information about wafer-level uniformity and defects. This innovative approach overcomes data acquisition barriers, efficiently compresses large datasets while ensuring data confidentiality, and holds immense potential for the development of advanced Electronic Design Automation (EDA) tools, expediting the realization of collaborative optimization in manufacturing processes and chip design flows.