Chung-Hsing Wang received B.S. degree in control engineering from National Chiao-Tung University , and M.S. degrees in electrical engineering from National Taiwan University in 1993.

In 1995, he joined Cadence Design System R&D group for physical verification software development. In 1997, he joined Taiwan Semiconductor Manufacturing Company as a CAD engineer. Since then, he has been working on physical design flow development and customer chip implementations projects in Design-Technology-Platform group in TSMC, where he is currently a technical director. He is one of the key engineers for TSMC Reference Design Flow Program. He pioneered the hierarchical floorplan flow, digital cross-talk analysis flow, and low-power design flows with major EDA partners from 1999 to 2007.

In 2013, he was elected as an Academician of TSMC Academy. His current research interests include digital design methodology and design performance analysis for advanced technology. He has been granted more than 100 US patents.